Electrostatic discharge (ESD) can damage an IC. Metal-oxide semiconductor (MOS) IC's are especially prone to ESD damage because their thin gate dielectrics rupture at moderate voltages. ESD is also a problem for bipolar IC's, though somewhat less than in the MOS case. The base-emitter junctions in bipolar IC's are most susceptible to ESD damage. As IC dimensions shrink, ESD becomes more of a concern for both bipolar and MOS IC's.
ESD occurs during IC aassembly, test, transfer, and installation. Static electricity generated by an individual handling an IC or by the action of the IC sliding down the rails of a shipping carrier or an automatic test device discharges across the IC. A person readily generates 1,000-10,000 volts of static electricity. The source resistance of the human body partially alleviates teh destructive effect of this high voltage. Nonetheless, the resulting voltage can be very damaging. The ESD produced when the IC slides down the shipping-carrier or test-equipment rails can be equally harmful. Consequently, a protection mechanism is usually incorporated into the IC to prevent ESD damage.
Various models are employed to evaluate sensitivity to ESD. Manzoni, "Electorstatic Discharge Protection in Linear ICs," IEEE Trans. Cons. Elec., August 1985, pp. 601-607, discusses the principal models. Referring to FIG. 1, it illustrates one of these models. FIG. 1 shows hos a circuit 10 emulating the human body interacts wtih an IC 12 that contains a device 14 for protecting a circuit component 16.
A voltage V.sub.E that emulates the actual electrostatic voltage is applied through a two-pole switch 18 to a capacitor C.sub.HB in human body circuit 10. Capacitor C.sub.HB represents the human body capacitance of 100-200 picofarads. After capacitor C.sub.HB is charged to V.sub.E, switch 18 is moved from its charging position to its discharging position. Capacitor C.sub.HB discharges through a resistor R.sub.HB representing the human body resistance of 1,000-2,000 ohms to produce a voltage V.sub.G relative to ground. Voltage V.sub.G is applied between two of the externally accessible terminals (or pins) of IC 12.
Turning to IC 12, it has supply terminals T.sub.L and T.sub.H that receive suitable supply voltages, referred to here as "V.sub.LL " and "V.sub.HH ", during normal powered IC operation. V.sub.HH is greater than V.sub.LL. Protected circuit component 16 is internally connected to terminals T.sub.L and T.sub.H to receive operating power from them.
IC 12 has a group of terminals for transferring information, such as digital data or analog signals, between component 16 and the external environment during normal powered IC operation. These terminals are referred to categorically as information terminals to differentiate them from terminals T.sub.L and T.sub.H and any other IC supply pins. The information transmitted through the information terminals may include reference signals that are not supply voltages. FIG. 1 shows one such information terminal T.sub.N. Protection device 14, which is connected between terminal T.sub.N and component 16, has little effect on the information transmission as long as the voltage at terminal T.sub.N lies between the voltages at terminals T.sub.L nad T.sub.H.
When ESD causes the voltage between any two of terminals T.sub.L, T.sub.N, T.sub.H to approach a magnitude that could damage component 16, device 14 becomes active and attempts to limit this voltage on a non-destructive level. Resistor R.sub.HB is part of the operational dynamics of the protective action because it damps the V.sub.E discharge from capacitor C.sub.HB. FIG. 1 illustrates the specific situation in which voltage V.sub.G is applied between terminals T.sub.N and T.sub.L.
Protection device 14 has been implemented in many ways in the prior art. FIG. 2 shows an implementation employing a pair of semiconductor diodes D.sub.A and D.sub.B connected in series between terminals T.sub.L and T.sub.H. The D.sub.A cathode and the D.sub.B anode are coupled in common through a current-limiting resistor R.sub.P to terminal T.sub.N. Device 14 may also include further voltage protection circuitry 20 connected to terminal T.sub.N and/or resistor Rp. See Manzoni mentioned above. Also see Funk, "Susceptibility of semiconducotrs to electrostatic damage," Elec. Engrg., March 1983, pp. 51-59.
IC 12, including device 14 and component 16, is fabricated from a semiconductor body having an upper surface along whch the various circuit elements are located. In device 14 of FIG. 2, diodes D.sub.A and D.sub.B are conventionally formed as "surface" diodes. That is, the PN junction between the anode and cathode of each diode D.sub.A or D.sub.B l reaches the upper semiconductor surface. U.S. Pat. Nos. 3,673,428 and 3,967,295 describe examples of this construction.
Embodying diodes D.sub.A and D.sub.B as surface diodes is disadvantageous because the highest diode dopaant concentrations normally occur at the upper semiconductor surface. ESD currents flowing through the diode PN junctions thereby focus strongly at the upper semiconductor surface. Because the overlying dielectric material does not dissipate heat well, diodes D.sub.A and D.sub.B fail at undesirably low ESD voltages. This renders component 16 vulnerable to subsequent ESD pulses. The problem becomes worse as circuit dimensions shrink.